1. Field of the Invention
This invention relates to a semiconductor package and, more specifically, to a method of providing electrically conductive vias in a substrate.
2. Brief Description of the Prior Art
Ball grid array (BGA) and semiconductor chip size package substrates have relied upon either dual sided copper metallized electrically insulating material, generally a polyimide tape or other laminated substrates as a starting material. The process of making through holes or vias through such substrates and also providing an electrically conductive path through these holes or vias has required that the holes be either filled or plated with electrically conductive material. The formation of the holes or vias involves the use of very fine punches, laser punching or etching of the substrate and metal in most state of the art procedures for making such holes or vias. Once the holes or vias have been formed in the substrate, typically, the walls of the holes or vias are then plated to provide the electrical connection from the etched circuit on one surface of the substrate to the circuit, the circuit being either etched on the reversed side of the substrate or on a further substrate. These procedures have been relatively costly, tedious and have provided a yield loss point in the manufacturing process.